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Udskriv27/5 2011 kl. 15:09Altera kigger mod 3D chipteknologier
Altera's tilknytter sig imec's avancerede CMOS scaling program for 3-D proces-teknologi udvikling (in english).
Imec has announced it entered into a three-year research collaboration with Altera Corporation to develop advanced CMOS scaling technologies. Altera joins a growing number of fabless semiconductor companies that are part of imecs INSITE program, which provides member companies insight into near-term and future IC technology options. The initial collaboration between imec and Altera will focus on the development of 3-D process technologies targeting Alteras product families.
The imec INSITE program makes information from imecs advanced process technology research programs available for the product design community in IDMs, fabless, fablite, and system-design companies in formats that can be used for early assessment of the impact and potential of those technologies for product roadmaps.
Imecs solution allows for early feedback towards technology specification, early decisions on required architectural design changes, and faster learning cycles for technology adoption with reduced risks. The program allows imec to derive specifications for next-generation technologies from future system requirements.
- We welcome Altera as an important partner in our technology-design ecosystem that leverages technology and design expertise from imec, IDMs, fabless and fab-lite companies, and system-design companies, says Luc Van den hove, President and CEO imec.
- Designing ever more advanced systems and applications becomes increasingly challenging with every new technology node. This offering helps companies anticipate new technologies so that they get their products on the market faster.
- Our ongoing research and development efforts in 3-D stacked silicon technology are a natural evolution of our product development, says Misha Burich, senior vice president of research and development at Altera Corporation.
- The information we receive through imecs advanced CMOS scaling program complements our own internal developments which provides us with valuable insight as we execute on our product roadmaps.
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