Medieplan 2012 DK
Send til en ven 
Udskriv18/10 2011 kl. 9:43Lattice lancerer ny 'classic' værktøjssuite
Lattice seneste version af IspLEVER værktøjssuiten inkluderer bla. support af ispMACH 4000ZE CPLD'er (in english).
Lattice Semiconductor announces the immediate availability of its ispLEVER Classic version 1.5 design tool suite. This new Windows-based version is now available for download and licensing at no charge from the Lattice website.
The comprehensive ispLEVER Classic 1.5 design software continues to support the ultra-low power ispMACH 4000ZE CPLD family as well as all of Lattice's mature programmable devices, including GAL and ispGAL Simple PLDs (SPLDs); ispLSI, MACH, ispMACH and ispXPLD Complex PLDs (CPLDs); ORCA, FPSC and ispXPGA Field Programmable Gate Arrays (FPGAs); and ispGDX/ispGDX2 crosspoint devices.
Lattice's ispLEVER Classic 1.5 design software includes everything necessary to take a project from concept through to a programmed device and provides a powerful set of software tools for all design tasks, including project management, HDL design entry, module/IP integration, place and route, timing analysis, in-system logic analysis and much more. Tool reporting has been improved with version 1.5, to make it easier to interpret.
The Windows 7 64-bit OS is also now fully supported. Lattice also works closely with industry leaders Synopsys and Aldec to provide superior HDL synthesis and simulation solutions, fully integrated into the ispLEVER Classic design flow.
- With release 1.5 of ispLEVER Classic, Lattice reaffirms its commitment to provide regular maintenance for our CPLD-based and high volume mature silicon products. Our ispLEVER Classic design software continues to be a complementary product to our Lattice Diamond® design environment, for which we continue to develop advanced system-on-chip design capabilities for our latest low power, low cost FPGAs, says Mike Kendrick, Lattice Director of Design Tools Marketing.
www.latticesemi.com/ispleverclassic.
Relaterede nyheder
- • Referencedesign beskytter FPGA IP
- • Altera demonstrerer optisk FPGA-teknologi
- • Lattice understøtter MIPI BIF standard
- • Intel skal producere chips for ny PLD-pioner
- • Xilinx gør det lettere at designe med de nye FPGAer i 7-serien
- • Tre nye applikations-optimerede LatticeECP3 FPGA'er
- • Lattice køber SiliconBlue Technologies
- • Processorplatform med integreret FPGA er nu i produktion
- • Altera kan nu levere 28nm Arria V FPGA'er
- • Lattice lancerer ny FPGA-familie
- • FPGA-board til OpenRISC SoC designs
- • FPGA-modul til realtime Ethernet
- • Synopsys forbedrer FPGA-baserede prototypeværktøjer
- • FPGA'er i verdens mest kraftfulde konfigurerbare computer
- • Altera med ny Quartus II 11.1 software
Seneste nyheder
- • Kontron satser stort på den nyeste Intel Core i7 processorteknologi
- • LG demonstrerer 55 tommer OLED tv i Europa
- • Exova Metech tilbyder nu kalibrering af ESD pistoler
- • Mouser udbygger med leverandør af antenner til M2M applikationer
- • EBV-magasin om funktionel sikkerhed
- • Bluetooth audiomodul til trådløse højttalersystemer
- • Techno-Matic i nyt forretningsområde
- • Årets Elektropris er uddelt
- • Første SAR A/D-konverter med SPICE model
- • Premier Farnell får ny chef
- • Step-down konverter opererer med 96 procent effektivitet
- • Maxwell Technologies hos Digi-Key
- • Højeffektive DC/DC-konvertere i brick-format
- • Farnell udvider med GNSS/GPS receivere
- • Fuld HD LCD-modul med stor betragningsvinkel
- • Ny teknologi skræmmer fugle væk fra markerne
- • Silicon Labs køber 2,4 GHz specialisten Ember
- • Touch platform emulerer fysiske trykknapper
- • AMD udvider APU platformen med ny R-serie
- • Ericsson klar med ny generation af powermoduler
- • Første 4 Gbit LPDDR'er i 20nm teknologi
- • SemiSouth sampler første 650V SiC JFETs
- • Digi-Key i globalt samarbejde med t-Global Technology
- • austriamicrosystems bliver til 'ams'
- • Find spændende apps til OrCAD og Allegro på nettet