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Send til en ven   Udskriv8/10 2009 kl. 9:41
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Ny 4G processorarkitektur med multithreading

IMEC lancerer ny version af processor-arkitekturer til 4G systemer, der understøtter multithreading (in english).

IMEC unveils the second generation of its ADRES processor architecture (architecture for dynamically reconfigurable embedded systems). ADRES now supports multithreading, and has doubled its performance and energy efficiency compared to the first ADRES generation. This positions ADRES as a building block for future 4G devices.

ADRES can be licensed from IMEC and is targeted at chip manufacturers. Companies interested in further developing this technology are welcome to join in IMEC’s collaborative research.


ADRES is a processor architecture designed for wireless and multimedia processing in single- and multiprocessor systems. ADRES processors are suited for future mobile terminals, such as software-defined radios. They combine state-of-the-art power efficiency, excellent performance, and flexibility.

Through an XML template, designers can create the ADRES processor instance that is best suited for their applications. Applications for an ADRES processor can be completely programmed in a high-level programming language (C) and compiled with IMEC’s DRESC compiler. This is of key importance for a short time-to-market.

Liesbet Van der Perre, program director wireless communication in IMEC:
- The current architecture is designed to support 600Mbps 802.11.n on two cores with a total power use of 220mW, using 40nm technology. Compared to the first generation ADRES, this is a doubling of both performance and energy efficiency. In addition, beginning of 2010, ADRES will be extended with wide SIMD. This will improve the energy efficiency with another 30%. As a proof of concept, we’ve successfully mapped a 40MHz WLAN MIMO receiver on an instance of the new ADRES.
 
IMEC’s second generation ADRES is a stepping stone for its research into a baseband processor that will support the full 4G requirements. These include wireless connectivity up to gigbits/s, runtime resource management, support for 4x4 MIMO, and support for the latest versions of the WiFi and LTE standards.
-  We expect to have a first instantiation of this processor ready in the course of 2010, says Liesbet Van der Perre.

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