Power, strømforsyning, EMC/ESD

 

Buck-konvertere med integreret ferrit-bead kompensation

Buck-konvertere med integreret ferrit-bead kompensation

Texas Instruments lancerer ny serie af low-noise konvertere med integreret ferrit-bead kompensation, hvilket simplificerer design af applikationer, hvor der stilles de højeste præcisionskrav (in english).

Texas Instruments (TI) has introduced a new family of low-noise DC/DC switching regulators with integrated ferrite-bead compensation. The TPS62912 and TPS62913 offer low noise of 20 µVRMS for frequencies ranging from 100 Hz to 100 kHz and ultra-low output-voltage ripple of 10 µVRMS, giving engineers the ability to remove one or more low-dropout regulators (LDOs) from their designs, reduce power losses by up to 76% and save 36% of board space.

Noise in the power supply is a key design challenge in many high-precision test and measurement, medical, aerospace and defence, and wireless infrastructure applications. A traditional low-noise power-supply architecture includes a DC/DC converter; a low-noise LDO such as the TPS7A52, TPS7A53 or TPS7A54; and an off-chip filter, such as a ferrite bead.


By integrating ferrite-bead compensation, the TPS62912 and TPS62913 use the ferrite bead already present in most systems as an effective filter against high-frequency noise, reducing the power supply output voltage ripple by approximately 30 dB and simplifying the power supply design. 

Easily minimize power-supply noise

High-precision systems require supply rails with low noise and low ripple to preserve signal accuracy and integrity. The TPS62912 and TPS62913 offer both, along with a power-supply rejection ratio of 65 dB at up to 100 kHz. In addition, this buck converter family has an output-voltage error of less than 1%, which helps ensure tight output-voltage accuracy. Both converters enable the use of spread-spectrum frequency modulation to further attenuate radio-frequency spurs and allow synchronization to an external clock so engineers can easily meet their signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) targets, which are critical in applications such as medical imaging or radar.

Maximize efficiency while reducing power loss

Historically, engineers have faced a trade-off between noise and efficiency when powering sensitive analog circuitry. Using a switching regulator on its own would result in too much switching noise, while adding a post-regulator LDO to reduce noise would lead to additional power losses, especially at high load currents.

With a peak efficiency of 97%, the TPS62912 and TPS62913 allow engineers to design for noise filtering without an LDO, reducing power losses by up to 76% – 1.8 W in analog front-end (AFE) designs and 1.5 W in designs using a wideband analog-to-digital converter (ADC), such as the ADC12DJ5200RF. This represents a 20% and 15% increase in efficiency, respectively, when compared to a traditional low-noise power architecture. 

Save board space and overall system cost

By using the TPS62912 or TPS62913 in their designs, engineers can eliminate not only the linear regulator but also the associated passive components, which can save approximately 20 mm2 of printed circuit board (PCB) area per LDO. Designs that typically use a single LDO can save 36% of PCB space. In addition, the integrated ferrite-bead compensation of the buck converters helps engineers reduce the overall DC/DC component count, eliminating two capacitors and two resistors from their designs, to further minimize overall system cost and shorten design time.
22/10 2020