Industriens første 16-ports 50GbE PHY transceiver
Marvells ny 8X7120 16-ports 50G Ethernet PHY er fuldt kompatibel med de nye IEEE 802.3cd og 802.3bs standarder og retter sig mod datacenter applikationer (in english).Marvell, a leader in storage, networking and connectivity semiconductor solutions, today announced the launch of the 88X7120, the latest offering in its Alaska C family of high-speed Ethernet physical layer (PHY) transceivers, designed to improve bandwidth and performance in the data center.
The new transceiver is purpose-built to address the transition in hyperscale data centers from 25GbE (Gigabit Ethernet) and 100GbE to 50GbE, 200GbE and 400GbE as new applications like artificial intelligence and machine learning continue to drive exponential processing and I/O bandwidth demands. The 88X7120 addresses this I/O speed transition in hyperscale data centers with support of 16 ports of 50GbE, 4 ports of 200GbE and 2 ports of 400GbE, utilizing 50G PAM4 signaling.
Marvell provides a wide variety of products for data center applications and PHYs are a critical element in Marvell’s strategy, as they form the backbone of high-speed data center interconnects. The new transceivers add to the Marvell portfolio of switches and other differentiated products targeted at the data center market, including scaling interconnect speeds to match the I/O throughput requirements in a cost-effective and power-efficient manner.
The transceivers are also the first PHY devices on the market to be fully compliant with new IEEE 802.3cd standards that define PAM4-based 50GbE port types. The port density on the 88X7120 has been specifically optimized to enable QSFP-DD (Quad Small Form Factor Pluggable – Double Density) and OSFP (Octal Small Form Factor Pluggable) port types for 50GbE, 200GbE and 400GbE deployments.
The devices also provide gearboxing functionality for translating between PAM4 and NRZ port types to enable a smooth transition to the newer Ethernet speeds, while maintaining support for existing optics and ASIC I/Os. They have a fully symmetric architecture, with long reach SerDes on both system and line side interfaces, to enable system design flexibility and to support both optical and direct-attach copper interconnects. The 88X7120 is sampling to key customers today.
Chris Koopmans, executive vice president, Networking & Connectivity, Marvell explains:
- Increasing the throughput rate to 50Gb per lane is critical to meeting the rapidly growing bandwidth requirements in today’s hyperscale data center environments. Our next generation PHY transceivers provide the highest performance solution in the industry and will be essential to helping customers meet the ever expanding bandwidth needs of their next-generation networks.
Yuval Bachar, principal engineer, Global Infrastructure Architecture and Strategy, LinkedIn adds:
- The constant bandwidth growth in our data centers is driving the rapid adoption of higher I/O speeds for improved system density, bandwidth and performance. With the deployment of next-generation servers and switches, copper and optical connectivity will be extended into the 50GbE, 200GbE and 400GbE, from the 25G copper signaling and 100G optical connectivity we have now. This will require new interconnect technologies to enable the technology adoption within hyperscale and medium-sized data centers.
Bob Wheeler, principal analyst for networking, Linley Group says:
- With this new PHY device, Marvell is jumpstarting the 50G Ethernet ecosystem and demonstrating its continued commitment to the data center space. We expect standards-compliant 50G server access to ramp in 2019, and Marvell is enabling high-density switches by doubling the port density of competing solutions.