Lattice gør det lettere at designe optiske Ethernet system management interfaces
Nyt reference design baner vejen for multi-gigabit IEEE 802.3 MDIO interface controllere baseret på små, low power FPGA'er i MachXO3 og ECP5 familierne (in english).
Lattice Semiconductor is helping engineers quickly implement optical Ethernet designs up to 100Gb/s with the publication of a new reference design for IEEE 802.3 Management Data Input/Output (MDIO) interface controllers.Reference design RD1194 uses the world’s smallest, lowest cost per I/O programmable platform, the MachXO3 family, or the new ECP5 family. The ECP5 features the industry’s highest functional density with up to 85k LUTs and SERDES in tiny 10mm x 10mm packages. With their small size and low power, MachXO3 and ECP5 devices are perfect for implementing I/O expansion, bridging or connectivity needed to deliver Multi gigabit Ethernet applications such as CFP2/4 modules.
Designers can use the reference design to implement a simple Wishbone user logic interface that enables the user to access the PHY registers. It supports MDIO IEEE 802.3 Clause 45/22 master/slave controllers and features pre-amble pattern selection through the input port.
http://www.latticesemi.com/MDIO
