Referencedesign beskytter FPGA IP

Maxim introducerer security referencedesign til Spartan-6 baserede FPGA-designs (in english).

Maxim Integrated Products announces a reference design to protect Xilinx Spartan-6 FPGAs. The reference design comprises free security software from Maxim or Xilinx and the Maxim DS28E01-100, a 1-Wire® secure memory device. 

Operating over a single pin, the built-in challenge-and-response SHA-1 authentication scheme in the DS28E01-100 prevents unauthorized product builds and safeguards FPGA IP. The reference design allows manufacturers to remotely turn on fee-based software-controlled feature upgrades, without physically altering the installed hardware.

The security scheme requires secret keys to be loaded in the FPGA and the 1-Wire secure memory. Maxim’s reference core seamlessly overlays on the Spartan-6 device; utilizes less than 5% of the logic cell resources and eases the loading of secret keys into the FPGA. Maxim can also preprogram* the DS28E01-100 with customer-specified keys prior to delivery.