Udviklingskit til 40nm FPGA'er

Altera lancerer et Stratix IV GX FPGA udviklingskit, der skal lette vejen til design med 40nm FPGA'er (in english). 

Altera has announced availability of the Stratix IV GX FPGA Development Kit. The kit features hardware and software solutions for the rapid creation of designs using Altera's high-performance 40-nm Stratix IV GX FPGAs with integrated 8.5-Gbps transceivers.

The development kit provides an ideal environment for designing and testing high-speed serial interfaces, such as PCI Express (PCIe) Gen2, with up to x8-lane configurations.
The Stratix IV GX FPGA Development Kit offers a complete PCIe Gen2 end-point hardware design package, featuring a PCI-SIG-compliant board and two PCIe Gen2 hard intellectual property (IP) cores in the Stratix IV GX FPGA.

A PCIe high-performance reference design that demonstrates both the software and hardware elements of a PCIe system is available for download on the Altera website. The two elements of this reference design communicate with drivers created using Jungo's PCIe WinDriver tool forming a fully functional PCIe system. Several other popular protocols are supported by the development kit through the use of high-speed mezzanine cards available from Altera partners, including 10 Gigabit Ethernet (10 GbE), CPRI, OBSAI, SAS/SATA and Serial RapidI® (SRIO).

- We work closely with Altera to ensure our PCIe WinDriver development toolkit complement and work seamlessly with the PCIe hard IP cores in Stratix IV GX FPGAs," says Ophir Herbst, general manager of Jungo's connectivity business unit.
- Our proven software drivers in combination with Altera's Stratix IV GX FPGA Development Kit provide our mutual customers a complete environment to design and implement leading-edge PCIe 2.0 x8 solutions.

8/6 2009